EtherCAT is widely used in servo drives, robot controllers, industrial I/O, and motion-control systems because it provides deterministic real-time communication over standard Ethernet physical-layer technology.
But a board that works reliably on the bench may still suffer CRC errors, link drops, or resets when installed near servo inverters, VFDs, or high-current motor stages.
Reliable EtherCAT PCB design depends on more than routing a 100Ω differential pair. The entire signal path must be considered:
ESC → PHY → Magnetics → Connector → Cable
along with the supporting PCB design:
Clock + Power + Grounding + EMC + Manufacturing + Assembly + Testing
This guide focuses on standard copper 100BASE-TX EtherCAT hardware.
1. EtherCAT Hardware Architecture for PCB Designers
The easiest way to understand an EtherCAT board is to look at its hardware signal path:
Application MCU / FPGA
↓
EtherCAT SubDevice Controller (ESC)
↓
Ethernet PHY
↓
Magnetics
↓
RJ45 / M12 Connector
↓
EtherCAT Cable
The ESC processes EtherCAT frames and exchanges data with the local application controller. The PHY handles the electrical Ethernet interface between the digital circuitry and the cable.
Common EtherCAT Hardware Architectures
| ESC + external PHY | Medium | Medium | High | Industrial controllers |
| ESC with integrated PHY | Low | Low | Medium | Compact I/O and servo nodes |
| FPGA + EtherCAT IP | High | High | Very high | Advanced motion control |
| MCU/SoC integrated solution | Low | Low-Medium | Device-dependent | Integrated automation |
An ESC with integrated PHYs can reduce PCB area, routing, and component count. An external-PHY design offers more flexibility in PHY selection, diagnostics, and component sourcing.
Define the hardware architecture before finalizing the PCB stack-up and component placement.
2. EtherCAT PHY Selection and MII/RMII
A standard 100BASE-TX PHY is not automatically suitable for EtherCAT. Select the PHY with the EtherCAT ESC and check it against the vendor’s implementation guidance.
Key considerations include:
- ESC compatibility
- Link-down detection
- Forwarding behavior
- Clock architecture
- Diagnostics
- Industrial temperature range
- EMC performance
MII vs. RMII
| Typical reference clock | 25 MHz | 50 MHz |
| Pin count | Higher | Lower |
| PCB routing | More signals | Fewer signals |
| EtherCAT use | Common implementation | Only when supported |
| Main advantage | Established implementation path | Lower pin count |
Choose the PHY to match the specific ESC implementation rather than treating any 100BASE-TX device as interchangeable.
RMII can reduce pin count and routing density, but use it only when the selected EtherCAT architecture explicitly supports it.
3. EtherCAT PCB Stack-Up and 100Ω Differential Routing
EtherCAT does not require a four-layer PCB, but industrial designs commonly use four or more layers because they provide better control over reference planes, impedance, power distribution, and EMC.
Typical 4-Layer Stack-Up
| L1 | Components and signal routing |
| L2 | Solid ground plane |
| L3 | Power and low-speed signals |
| L4 | Signal routing |
This is only a starting point. Base the final stack-up on the actual board thickness, laminate system, copper weight, and impedance requirements. These same factors also form the foundation of a reliable high-speed PCB design.
What Controls 100Ω Differential Impedance?
The MDI differential pairs typically target 100Ω differential impedance. For production boards, proper controlled impedance PCB fabrication is needed to keep this target consistent across stack-up and process variations. Trace width is important, but the final impedance also depends on:
- Dielectric thickness and Dk
- Finished copper thickness
- Pair spacing
- Copper plating
- Etch compensation
- Solder mask
Because these parameters vary with the production stack-up, the PCB manufacturer may adjust trace width or spacing during impedance optimization while maintaining the required 100Ω differential target.
4. PHY-to-Magnetics PCB Layout
Treat the Ethernet front end as one continuous signal path:
Connector → Protection / Shield Area → Magnetics → PHY → ESC
Follow the selected PHY reference design for the exact placement of TVS devices, common-mode components, and magnetics.
Routing the 100BASE-TX Differential Pairs
Keep the MDI pairs:
- At the required differential impedance
- Geometrically consistent
- Referenced to a stable plane
- Free of unnecessary vias and stubs
- Away from DC/DC switch nodes, power inductors, motor phases, and other high-current switching areas
Length Matching
Follow the PHY vendor’s intra-pair skew limits rather than forcing the traces to look perfectly equal.
The priority should be:
consistent geometry → stable impedance → controlled skew
5. Grounding, Shielding, and EtherCAT EMC
EtherCAT interfaces often operate close to servo drives, VFDs, motor stages, DC/DC converters, and long industrial cables. In these environments, grounding and common-mode current control are critical to overall PCB signal integrity and EMC performance.
Digital GND, Chassis GND, and Cable Shield
| Digital GND | Reference for the ESC, PHY, MCU, and logic |
| Chassis Ground | Return path for high-frequency ESD, EFT, and common-mode currents |
| Cable Shield | Controls external EMI and shield current |
Keep cable-shield and transient currents away from the ESC and MCU digital ground.
Ground Plane Strategy
Between the ESC and PHY, use a continuous reference plane and avoid routing across ground splits. A solid PCB ground plane helps maintain a predictable return path and reduces EMI.
Between the PHY, magnetics, and connector, follow the selected PHY and magnetics reference design rather than applying a universal copper-clearance rule.
Why EtherCAT Can Fail Near Motors
A common interference path is:
Motor / Inverter → Chassis or Cable Shield → Ethernet Front End → PHY → CRC Errors or Link Loss
This is why a board that works reliably on the bench may behave differently inside a motor-control system.
Connector-Side Protection
Place ESD and EFT protection close to the connector, using low-capacitance devices and a short return path to chassis ground.
6. EtherCAT PCB Manufacturing and DFM
A well-designed EtherCAT PCB still depends on consistent manufacturing.
Controlled-Impedance Production
The PCB manufacturer should receive clear requirements for:
- 100Ω differential impedance
- Routing layers
- Copper thickness
- Dielectric structure
- Production stack-up
Trace width or spacing may be adjusted during fabrication to account for material and process tolerances while maintaining the required 100Ω differential impedance.
Impedance Verification
Impedance coupons and TDR testing can verify whether the fabricated differential pairs meet the specified target. These measurements are part of broader PCB inspection and testing used to verify fabrication quality.
TDR verifies PCB impedance, not EtherCAT protocol performance.
ESC / PHY Fanout
Fanout should match the package pitch and routing density.
| Dog-bone via | Low-Medium | Wider-pitch packages |
| Microvia | High | Fine-pitch BGA |
| Via-in-Pad / VIPPO | Very high | Dense QFN/BGA layouts |
Use via-in-pad only when package density or limited PCB space justifies the added manufacturing complexity.
7. EtherCAT PCBA Assembly and Testing
Bare-board quality is only part of EtherCAT reliability. Assembly quality, component control, and functional verification matter just as much.
Critical Assembly and BOM Controls
Pay particular attention to the ESC and PHY solder joints, magnetics orientation, RJ45 or M12 connector soldering, oscillator components, PHY strap resistors, and reset circuitry.
Do not substitute critical interface parts based only on package size or nominal value. This is especially important for:
- Ethernet PHYs
- Magnetics
- Common-mode chokes
- TVS diodes
- Crystals and oscillators
- MagJacks
A replacement part may have different parasitic capacitance, insertion loss, timing behavior, or EMC performance.
EtherCAT PCBA Test Flow
| Bare PCB | Continuity, shorts, impedance coupon, TDR |
| Electrical Bring-Up | Power rails, current draw, reset, oscillator, PHY straps |
| PHY Testing | Port 0 / Port 1 link, LEDs, cable detection |
| EtherCAT Functional Test | MainDevice communication, PDO exchange, dual-port operation, error counters |
| Conformance-Oriented Validation | ESI, CTT, interoperability checks |
These stages verify different parts of the hardware and communication stack.
TDR, PHY link testing, EtherCAT functional testing, and conformance testing are not interchangeable.
8. Common EtherCAT PCB Failures
| Symptom | Likely Cause | What to Check |
| No link | PHY, clock, magnetics | Rails, oscillator, PHY straps |
| Only one port works | Connector or assembly issue | Port signal chain |
| CRC errors | SI or EMC problem | Routing, cable, shield, impedance |
| Link drops when motor starts | Common-mode interference | Chassis, shield, PHY power |
| Prototype works, production fails | Stack-up or BOM change | TDR, substitutions, assembly |
| Board resets during EFT | Poor transient-current path | TVS, chassis, power/reset |
These failures show why EtherCAT debugging should consider the entire hardware path, not treat every communication problem as a firmware issue.
FAQ About EtherCAT PCB Design
Does EtherCAT require a 4-layer PCB?
No. EtherCAT does not require four layers, but four or more layers are commonly preferred for controlled impedance, reference-plane continuity, power distribution, and EMC.
What impedance should EtherCAT PCB traces use?
100BASE-TX MDI differential pairs typically target 100Ω differential impedance, based on the selected PHY and production PCB stack-up.
How do you test an EtherCAT PCB after assembly?
A practical test flow is:
PCB/TDR verification → electrical bring-up → PHY link test → EtherCAT functional test → conformance validation
Conclusion
Reliable EtherCAT PCB design depends on the entire hardware implementation, from ESC and PHY selection to 100Ω routing, magnetics, grounding, EMC, manufacturing, assembly, and testing.
For servo drives, industrial I/O modules, robot controllers, and motion-control systems, early coordination with the PCB manufacturer can help reduce impedance, DFM, and assembly risks before production.
MULTIPCB supports controlled-impedance PCB fabrication, PCB assembly services, DFM review, and prototype-to-volume production for EtherCAT and other industrial electronics.
